(1) Field of the Invention
The present invention relates to a constant on-time controller, and more particularly relates to a constant on-time controller with ripple compensation.
(2) Description of the Prior Art
The constant on-time synchronous buck converter is required smaller ripple in the output voltage with the trend in low operation voltage of the integrated circuit. To achieve the request of a smaller ripple of the output voltage, the constant on-time synchronous buck converter usually uses a multi-layer ceramic capacitor having a low equivalent series resistance as an output capacitance for supplying the output voltage. The multi-layer ceramic capacitor reduces the ripple of the output voltage, but simultaneously brings the stability problems. Therefore, the constant on-time synchronous buck converter is additionally injected with a ripple signal for improving the stability problems when using the multi-layer ceramic capacitor. The methods of injecting the ripple signal can be classified into two types: one is external injecting and the other is internal injecting, wherein the internal injecting type has the better cost advantage.
FIG. 1 is a circuit diagram of a conventional constant on-time controller with ripple compensation. The constant on-time controller controls a DC-DC buck converter to convert an input voltage Vin into an output voltage Vout. The DC-DC buck converter comprises a high-side transistor Q1, a low-side transistor Q2, an inductance L and an output capacitance Cout. The output capacitance Cout has an equivalent series resistance Rc. The high-side transistor Q1 and the low-side transistor Q2 are connected with each other via a phase node P, and another end of the high-side transistor Q1 is connected to the input voltage Vin and another end of the low-side transistor Q2 is connected to the grounding. One end of the inductance L is connected to the phase node P and the other end thereof is connected to the output capacitance Cout for generating the output voltage Vout.
The constant on-time controller is coupled to the phase node P of the high-side transistor Q1 and the low-side transistor Q2. The constant on-time controller comprises a pulse width modulation controller 11 and a drive 17. The pulse width modulation controller 11 comprises a synchronous signal generating circuit 13 and a pulse width modulation comparator 15. The synchronous signal generating circuit 13 comprises a low-pass filter 3 and an error amplifier 5. The low-pass filter 3 comprises a resistance R4 and a capacitance C4, and is connected to the phase node P for filtering the high frequency component of the voltage signal Vp of the phase node P, and generates a signal Slp with a triangle-like shape at a node X. A non-inverting end of the error amplifier 5 receives a voltage reference signal Vref1 and an inverting end thereof receives the signal Slp, and accordingly generates an error amplification signal S12. The pulse width modulation comparator 15 comprises an adder 7 and a comparator 9. The adder 7 superimposes the error amplification signal S12 and a voltage reference signal Vref2 to generates a superimposed signal S13. A voltage detection circuit 1 detects the output voltage Vout outputted by the DC-DC buck converter and generates a voltage detection signal Vfb. A non-inverting end of the comparator 9 receives the superimposed signal S13 and an inverting end thereof receives the voltage detection signal Vfb, and accordingly generates a pulse width modulation signal S9 to the drive 17. The driver 17 controls the high-side transistor Q1 and the low-side transistor Q2 according to the pulse width modulation signal S9 for stabilizing the output voltage Vout.
The weak point of the conventional constant on-time controller is that the ripple amount of the generated superimposed signal S13 varies significantly in the different applications. It results from that the amplitude and the duty cycle of the voltage signal Vp at the phase node P are changed significantly when applying different input voltage Vin, different output voltage Vout and/or different operating frequency This causes that deviation values between an actual output voltage and an ideal output voltage are different in the different applications.